JTAG is a popular testing and device programming scheme. JTAG is an acronym that stands for the Joint Test Action Group, which was a technical subcommittee responsible for developing the IEEE standard 1149.1. The JTAG standard sets out a methodology for performing testing on complex integrated circuits and circuit boards. JTAG provides a strategy to ensure the integrity of individual components and the interconnections between them after installation on a printed circuit board. Generally, the JTAG standard has become widely adopted.
According to the JTAG standard (JTAG/IEEE Std 1149.1), the integrated circuit architecture for a JTAG compatible device has a test access port (TAP port), which requires the use of at least four pins. In particular, a test clock (TOK) pin receives a test clock signal for the device under test. A test mode select (TMS) pin accepts commands to select particular test modes. A test data in (TDI) pin accepts data into the device under test. A test data output (TDO) pin sends data out from the device under test. An optional fifth pin, identified as the test-reset (TRST), enables the reset of a JTAG controller (TAP controller) initialization without affecting other device or system logic. Therefore, a JTAG compatible device requires at least four dedicated pins, and five dedicated pins if a TRST pin is used.
Integrated circuits contain more and more functionality. This increase in functionality often increases the number of pins implemented by a given integrated circuit. Each pin employed by an integrated circuit raises the manufacturing costs associated with producing the integrated circuit. Accordingly, reducing the pin count associated with integrated circuits is often desirable if functionality is not compromised.